1. Field of the Invention
This invention relates to the surface passivation of electronic devices implemented in III-V type semiconductors and particularly to the passivation of electronic devices implemented in gallium arsenide.
2. Description of the Prior Art
Gallium arsenide and other III-V type semiconductors are attractive candidate materials for the fabrication of high performance semiconductor components. Although such materials offer the promise of high operational speed, they generally suffer from a susceptibility to environmental degradation. Silicon semiconductor surfaces can be passivated by the development of a native oxide layer. However, attempts to surface passivate the III-V type semiconductors have not been entirely successful. The native oxide layers which can be formed on III-V compounds exhibit significant charge trapping under bias stress and, therefore, these native oxides are relatively ineffective as the surface passivation agent. In the case of gallium arsenide, growth of a native oxide layer leads to the formation of extrinsic defects yielding a high surface state density. In addition, most native III-V oxides are susceptible to environmental attack, for example, by moisture.
Known surface passivation methods for III-V compound semiconductors which are made typically of GaAs may be divided roughly into three types.
The first method utilizes deposited films such as SiO.sub.2, Si.sub.3 N.sub.4, Al.sub.2 O.sub.3 and P.sub.2 O.sub.5 which are known from their use as passivation films for the surfaces of silicon semiconductors. Such an approach has drawback that the deposition temperature is relatively high. SiO.sub.2 film is most frequently used in view of the extensive practical knowledge concerning the deposition of such film in planar silicon semiconductor devices. However, SiO.sub.2 films tend to take in Ga from the surface of a substrate made of GaAs or GaP, and as a result it will damage the stoichiometry of the surface of the substrate.
The second method is to form a native oxide film corresponding to a thermal oxidation film of silicon, in place of the deposited film suggested above. For example, the anodic oxidation method has the advantage that an insulating thin film can be formed at a markedly low temperature as compared with the deposition method and also with the thermal oxidation method, irrespective of the instances wherein a solution is used or a gas plasma is used. Conversely, however, this anodic oxidation method has the disadvantage that it is thermally unstable, and therefore, it has the drawback that the quality of the film will change substantially at a temperature below the temperature range adopted for thermal diffusion of impurities and post-ion implantation annealing. Furthermore, the interface between an anodic oxide film and a substrate made of GaAs or GaP tends to contain a number of defects, so that when this film is utilized as an insulating film of IG-FET (insulated - gate field effect transistor), there still cannot be obtained as yet a large value of surface mobility comparable with that within the bulk, and thus at the current technical stage, it is not possible for the anodic oxide film to fully display those advantages and features on applying it to the surface of GaAs and GaP substrates which are represented by high mobility as compared with a silicon substrate. In III-V semiconductors which essentially are binary compounds, a direct thermal oxidation of their surfaces has not yet produced any satisfactory results with respect to the quality of the film produced or to the state of interface. Such native oxide film has the further drawback that it is dissolved in acids such as HF, HCl, and H.sub.2 SO.sub.4. Therefore, native oxide films inconveniently cannot be used in such manufacturing process as would comprise a number of steps.
The third approach is to perform chemical oxidation by the use of, for example, hot hydrogen peroxide solution. This method is entailed by limitation in the thickness of the oxide film which is formed, and accordingly the extent of application of this method is limited also.
U.S. Pat. No. 4,320,178 describes the use of an A.sup.III B.sup.V sulfide for passivating an A.sup.III B.sup.V semiconductor substrate, such as GaAs. The process for forming the sulfide utilizes heating the substate with sulfur or hydrogen sulfide. The use of hydrogen sulfide gas to modify the surface properties of gallium arsenide is also known from J. Massies et al., "Monocrystalline Aluminum Ohmic Contact to n-GaAs by H.sub.2 S Adsorption", Appl. Phys. Lett., 38, (9), May 1, 1981, pp. 693-695, and J. Massies et al., J. Vac. Sci. Technol., 17, 1134 (1980). However, such surface modifications do not result in a passivation which is acceptable for opto-electronic devices.
U.S. Pat. No. 4,632,886 describes the use of an electrolyte solution of sulfide ions to provide a passivation layer on mercury cadmium telluride semiconductor substrates. The description is limited to a discussion of that specific compound semiconductor, and the passivation layer is described as being mercury sulfide, cadmium sulfide, and tellurium sulfide. Passivation of gallium arsenide in the same manner is not suggested, and to the contrary is still described as being obtained "by the formation of thermal oxides or nitrides."
Prior to the present invention there has not been a simple, easily implemented surface passivation technique for use in connection with electronic devices implemented in gallium arsenide and other III-V compounds which has been shown to achieve a sufficiently low surface recombination velocity and superior device operational characteristics.